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  rev.2.00 apr 13, 2006 page 1 of 7 HD74LVC2G126 dual bus buffer with 3?state output rej03d0212?0200 rev.2.00 apr 13, 2006 description the HD74LVC2G126 has dual bus buffer with 3?state output in an 8-pin package. low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. features ? the basic gate function is lined up as renesas uni logic series. ? supply voltage range: 1.65 to 5.5 v ? operating temperature range: ?40 to +85c ? all inputs: v ih (max.) = 5.5 v (@v cc = 0 v to 5.5 v) ? all outputs: v o (max.) = 5.5 v (@v cc = 0 v) ? output current: 4 ma (@v cc = 1.65 v) 8 ma (@v cc = 2.3 v) 24 ma (@v cc = 3.0 v) 32 ma (@v cc = 4.5 v) ? ordering information part name package type package code (previous code) package abbreviation taping abbreviation (quantity) HD74LVC2G126cle wcsp?8 pin sxbg0008kb?a (tbs?8av) cl e (3,000 pcs/reel) article indication e 2 6 y m marking year code month code package code (previous code) package abbreviation sxbg0008kb?a (tbs?8av) e 2 6 y m
HD74LVC2G126 rev.2.00 apr 13, 2006 page 2 of 7 function table inputs oe a output y h h h h l l l x z h: high level l: low level x: immaterial z: high impedance pin arrangement (bottom view) (top view) a2 27 3 45 gnd height 0.5 mm 0.5 mm pitch 0.23 mm 8?ball 0.9 mm 1.9 mm y2 y1 a1 oe2 6 18 oe1 v cc pin#1 inde x logic diagram a1 oe1 oe2 y1 2 1 6 a2 y2 5 7 3 (bottom view) 1.9 mm oe2 18 v cc
HD74LVC2G126 rev.2.00 apr 13, 2006 page 3 of 7 absolute maximum ratings item symbol ratings unit test conditions supply voltage range v cc ?0.5 to 6.5 v input voltage range *1 v i ?0.5 to 6.5 v ?0.5 to v cc +0.5 output : h or l output voltage range *1, 2 v o ?0.5 to 6.5 v v cc : off or output ?z? input clamp current i ik ?50 ma v i < 0 output clamp current i ok ?50 ma v o < 0 continuous output current i o 50 ma v o = 0 to v cc continuous current through v cc or gnd i cc or i gnd 100 ma package thermal impedance ja 102 c/w storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. the input and output voltage rati ngs may be exceeded if the input and output clamp-current ratings are observed. 2. this value is limited to 5.5 v maximum. recommended operating conditions item symbol min max unit conditions supply voltage range v cc 1.65 5.5 v input voltage range v i 0 5.5 v 0 v cc output voltage range v o 0 5.5 v output : z ? 4 v cc = 1.65 v ? 8 v cc = 2.3 v ? 16 ? 24 v cc = 3.0 v i ol ? 32 v cc = 4.5 v ? ?4 v cc = 1.65 v ? ?8 v cc = 2.3 v ? ?16 ? ?24 v cc = 3.0 v output current i oh ? ?32 ma v cc = 4.5 v 0 20 v cc = 1.65 to 1.95 v, 2.3 to 2.7 v 0 10 v cc = 3.0 to 3.6 v input transition rise or fall rate ? t / ? v 0 5 ns / v v cc = 4.5 to 5.5 v operating free-air temperature t a ?40 85 c note: unused or floating inputs must be held high or low. output clamp-current ratings are item symbol min max unit conditions 1.65 5.5 v 0 5.5 v 0 v cc 0 5.5 v ? 4 v ? 8 v ? 16 ? 16 ? 24 ? 32 v ? ?4 v ? ?8 v i oh ? t / ? v
HD74LVC2G126 rev.2.00 apr 13, 2006 page 4 of 7 electrical characteristics ta = ?40 to 85c item symbol v cc (v) min typ max unit test condition 1.65 to 1.95 v cc 0.65 ? ? 2.3 to 2.7 1.7 ? ? 3.0 to 3.6 2.0 ? ? v ih 4.5 to 5.5 v cc 0.7 ? ? 1.65 to 1.95 ? ? v cc 0.35 2.3 to 2.7 ? ? 0.7 3.0 to 3.6 ? ? 0.8 input voltage v il 4.5 to 5.5 ? ? v cc 0.3 v min to max v cc ?0.1 ? ? i oh = ?100 a 1.65 1.2 ? ? i oh = ?4 ma 2.3 1.9 ? ? i oh = ?8 ma 2.4 ? ? i oh = ?16 ma 3.0 2.3 ? ? i oh = ?24 ma v oh 4.5 3.8 ? ? i oh = ?32 ma min to max ? ? 0.1 i ol = 100 a 1.65 ? ? 0.45 i ol = 4 ma 2.3 ? ? 0.3 i ol = 8 ma ? ? 0.4 i ol = 16 ma 3.0 ? ? 0.55 i ol = 24 ma output voltage v ol 4.5 ? ? 0.55 v i ol = 32 ma input current i in 0 to 5.5 ? ? 5 a v in = 5.5 v or gnd off state output current i oz 3.6 ? ? 10 a v o = 5.5 v or gnd i cc 1.65 to 5.5 ? ? 10 v in = v cc or gnd, i o = 0 quiescent supply current ? i cc 3 to 5.5 ? ? 500 a one input at v cc ?0.6 v, other input at v cc or gnd output leakage current i off 0 ? ? 10 a v in or v o = 0 to 5.5 v input capacitance c in 3.3 ? 3.5 ? pf v in = v cc or gnd note: for conditions shown as min or max, use the appropriate values under recommended operating conditions. 2.3 ? ? i 4.5 3.8 ? ? i min to max ? ? 0.1 i ol 1.65 ? ? 0.45 i ol = 4 ma 2.3 ? ? 0.3 i ol = 8 ma ? ? 0.4 i ol = 16 ma ? ? 0.55 i ol = 24 ma 4.5 ? ? 0.55 i 0 to 5.5 ? ? 5 a v 3.6 ? ? 10 1.65 to 5.5 ? ? 10 3 to 5.5 ? ? 500 0 ? ? 10 input capacitance c in 3.3 ? 3.5 ? pf v note: for conditions shown as min or max, use the appropriate values under recommended operating conditions.
HD74LVC2G126 rev.2.00 apr 13, 2006 page 5 of 7 switching characteristics v cc = 1.80.15 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time t plh t phl 3.5 9.8 ns a y output enable time t zh t zl 3.5 10.0 ns oe y output disable time t hz t lz 1.7 12.6 ns c l = 30 pf, r l = 1.0 k ? oe y v cc = 2.50.2 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time t plh t phl 1.7 4.9 ns a y output enable time t zh t zl 1.7 5.0 ns oe y output disable time t hz t lz 1.0 5.7 ns c l = 30 pf, r l = 500 ? oe y v cc = 3.30.3 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time t plh t phl 1.4 4.0 ns a y output enable time t zh t zl 1.5 4.1 ns oe y output disable time t hz t lz 1.0 4.4 ns c l = 50 pf, r l = 500 ? oe y v cc = 5.00.5 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time t plh t phl 1.0 3.2 ns a y output enable time t zh t zl 1.0 3.1 ns oe y output disable time t hz t lz 1.0 3.3 ns c l = 50 pf, r l = 500 ? oe y operating characteristics ta = 25c item symbol v cc (v) min typ max unit test conditions 1.8 ? 19 ? 2.5 ? 19 ? 3.3 ? 20 ? power dissipation capacitance c pd 5.0 ? 22 ? pf f = 10 mhz 1.7 5.0 ns oe y ta = ?40 to 85c min max unit test conditions 1.4 4.0 ns 1.5 4.1 ns oe y lz 1.0 4.4 ns c l = 50 pf, r ta = ?40 to 85c symbol min max t plh t phl 1.0 3.2 ns t zh t zl t hz
HD74LVC2G126 rev.2.00 apr 13, 2006 page 6 of 7 test circuit open open test s1 vtt vtt s1 c l r l r l gnd gnd t / t plh phl t / t zh hz t / t zl lz 1.80.15 2.50.2 3.30.3 5.00.5 inputs v cc (v) v cc 2 v cc 2 v cc 6 v 2 v cc v cc / 2 v cc / 2 1.5 v v cc / 2 v cc v cc v cc v i v ref c l r l ?v vtt t r / t f 500 ? 0.15 v 0.15 v 0.3 v 0.3 v 500 ? 500 ? 1.0 k? load circuit from output 2 ns 2 ns 2.5 ns 2.5 ns 30 pf 30 pf 50 pf 50 pf v ref v ref v ref v ref v i 0 v t plh v t phl oh v ol input a output y v oh v ol input oe v ref v ref v ref v oh ? ?v v ol + ?v v ref v i v oh 0 v v ol t hz t lz t zh t zl output y (waveform ? a) output y (waveform ? b) notes: 1. c l includes probe and jig capacitance. 2. waveform?a is for an output with internal conditions such that the output is low except when disabled by the output control. 3. waveform?b is for an output with internal conditions such that the output is high except when disabled by the output control. 4. all input pulses are supplied by generators having the following characteristics: prr 10mhz, zo = 50 ?. 5. the output are measured one at a time with one transition per measurement. v ref t phl v ref t zl v ref t zh
HD74LVC2G126 rev.2.00 apr 13, 2006 page 7 of 7 package dimensions 0.20 0.05 0.50 0.90 0.50 maxnommin dimension in millimeters symbol reference 0.25 0.20 (0.315) * 0.05 0.20 y x d e b y 1 0.155 0.185 0.20 1.90 d c b 2 1 a pin#1 index area 1 y c c yc seating plane a b * reference value. cab c b8   m  m d e 1 2 a a d e a e z z e s-xfbga8-0.9x1.9-0.50 0.0015g mass[typ.] tbs-8av sxbg0008kb-a renesas code jeita package code previous code z d e a a 1 z e a 2 2 a cab cab c b8 b8 b8  b8  b8  m  m
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvements or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas technology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com refer to "http://www.renesas.com/en/network " for the latest and detailed information. renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500, fax: <1> (408) 382-7501 renesas technology europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k. tel: <44> (1628) 585-100, fax: <44> (1628) 585-900 renesas technology (shanghai) co., ltd. unit 204, 205, aziacenter, no.1233 lujiazui ring rd, pudong district, shanghai, china 200120 tel: <86> (21) 5877-1818, fax: <86> (21) 6887-7898 renesas technology hong kong ltd. 7th floor, north tower, world finance centre, harbour city, 1 canton road, tsimshatsui, kowloon, hong kong tel: <852> 2265-6688, fax: <852> 2730-6071 renesas technology taiwan co., ltd. 10th floor, no.99, fushing north road, taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology singapore pte. ltd. 1 harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas technology korea co., ltd. kukje center bldg. 18th fl., 191, 2-ka, hangang-ro, yongsan-ku, seoul 140-702, korea tel: <82> (2) 796-3115, fax: <82> (2) 796-2145 renesas technology malaysia sdn. bhd unit 906, block b, menara amcorp, amcorp trade centre, no.18, jalan persiaran barat, 46050 petaling jaya, selangor darul ehsan, malaysia tel: <603> 7955-9390, fax: <603> 7955-9510 renesas sales offices ? 2006. renesas technology corp., all rights reserved. printed in japan. colophon .6.0 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is 8. please contact renesas technology corp. for further details on these materials or the products contained therein. http://www.renesas.com/en/network " for the latest and detailed information. renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500, fax: <1> (408) 382-7501 renesas technology europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k. tel: <44> (1628) 585-100, fax: <44> (1628) 585-900 renesas technology (shanghai) co., ltd. unit 204, 205, aziacenter, no.1233 lujiazui ring rd, pudong district, shanghai, china 200120 tel: <86> (21) 5877-1818, fax: <86> (21) 6887-7898 renesas sales offices


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